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Ficha personal - Rafael Castro López


Nota: El investigador no está asociado a ningún departamento de la Universidad de Sevilla

Rafael Castro López
Perfil en ORCID: 0000-0002-6247-3124
Perfil en ResearcherID: N-3549-2014
Perfil en Scopus: 9638617300

Grupo de Investigación: Ingeniería de Circuitos y Sistemas Micro/Nano-Métricos

Responsable de los siguientes proyectos/ayudas en la US:

  • Proyecto de investigación:
    • The Variability Challenge in Nano-CMOS: from Device Modeling to IC Design for Mitigation and Exploitation (Vigilant-Imse) (PID2019-103869RB-C31)
    • Dispositivos, Circuitos y Arquitecturas Fiables y de Bajo Consumo para Iot (TEC2016-75151-C3-3-R)

Participa en los siguientes proyectos/ayudas en la US:

  • Proyecto de investigación:
    • Power, reliability and security challenges in advanced CMOS and beyond-CMOS devices and circuits (RESURGENCE) (US-1380876 - Equipo de Investigación)
    • Aproximación Multinivel al Diseño Orientado a la Fiabilidad de Circuitos Integrados Analógicos y Digitales (TEC2013-45638-C3-3-R - Equipo de Investigación)
    • Flexics: Técnicas de Diseño de Circuitos y Sistemas Micro-Nanoelectrónicos Flexibles y Reconfigurables de Bajo Consumo y Bajo Coste Aplicados a Comunicaciones Inalámbricas (P12-TIC-1481 - Investigador)
    • Circuitos Analógicos Flexibles para la Próxima Generación de Terminales Móviles Basados en Radio Definida por Software Integrados en Tecnologías CMOS Nanométricas (TEC2010-14825 - Investigador)
    • Platform4g: Desarrollo de una Plataforma de Diseño de Sistemas Adaptables para Sistemas de Telecomunicaciones de Cuarta Generación (P07-TIC-02532 - Investigador)

  • Ayuda a la investigación:
    • Incentivo al Grupo de Investigación TIC-026 (2017/TIC-026 - Investigador)
    • Incentivo al Grupo de Investigación TIC-179 (2011/TIC-179 - Investigador)
    • Ayuda a la Consolidación del Grupo de Investigación TIC-179 (2008/TIC-179 - Investigador)
    • Ayuda a la Consolidación del Grupo de Investigación TIC-179 (2007/TIC-179 - Investigador)
    • Ayuda a la Consolidación del Grupo de Investigación TIC-179 (2006/TIC-179)

Cobertura de la base de datos de proyectos, véase aqui


Publicaciones:

Libros
F. Passos, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Automated Hierarchical Synthesis of Radio-Frequency Integrated Circuits and Systems. A Systematic and Multilevel Approach. Cham, Switzerland. Springer. 2020. 189. ISBN 978-3-030-47246-7

Castro López, Rafael, Fernandez Fernandez, Francisco V., Guerra Vinuesa, Oscar, Rodriguez Vazquez, Angel:
Reuse-Based Methodologies and Tools in the Design of Analog and Mixed-Signal Integrated Circuits. Berlín. Springer. 2006. ISBN 1-4020-5126-3

Capítulos en Libros
F. Passos, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V.:
On the usage of machine-learning techniques for the accurate modeling of integrated inductors for RF applications. Pag. 155-178. En: Modelling Methodologies in Analogue Integrated Circuit Design. The Institution of Engineering and Technology. 2020. ISBN 978-1-78561-695-2

Martin Martinez, Javier, Diaz Fortuny, Javier, Toro Frías, Antonio, Martín, Pablo, Sarazá, Pablo, et. al.:
Modeling of variability and reliability in analog circuits. Pag. 179-206. En: Modelling Methodologies in Analogue Integrated Circuit Design. The Institution of Engineering and Technology. 2020. ISBN 978-1-78561-695-2

Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V., Gonzalez Echevarria, Reinier, Sieiro, Javier, et. al.:
Computational Intelligence Techniques for Determining Optimal Performance Trade¿Offs for RF Inductors. Pag. 277-296. En: Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design. Springer International Publishing. 2015. ISBN 978-3-319-19871-2

Fernandez Fernandez, Francisco V., Sanchez Lopez, Carlos, Castro López, Rafael, Roca Moreno, Elisenda:
Approximation techniques in symbolic circuit analysis. Pag. 173-201. En: Design of analog circuits through symbolic analysis. Bentham Science Publishers. 2012. ISBN 978-1-60805-425-1

Fernandez Fernandez, Francisco V., Sanchez Lopez, Carlos, Castro López, Rafael, Roca Moreno, Elisenda:
Symbolic pole/zero analysis. Pag. 287-304. En: Design of analog circuits through symbolic analysis. Bentham Science Publishers. 2012. ISBN 978-1-60805-425-1

Castro López, Rafael, Roca Moreno, Elisenda, Fernandez Fernandez, Francisco V.:
Closing the GAP Between Electrical and Physical Design: the Layout-Aware Solution. Pag. 243-267. En: Analog Layout Synthesis: a Survey of Topological Approaches. Ed. 1. New York, USA. Springer. 2010. ISBN 978-1-4419-6931-6

Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Mixed Analogue/Digital and Rf. Pag. 105-122. En: Medea + Design Automation Roadmap. Paris, France. Medea +. 2005. ISBN 2-9520704-2-3

Fernandez Fernandez, Francisco V., Rio Fernandez, Rocio del, Castro López, Rafael, Medeiro Hidalgo, Fernando Manuel, Guerra Vinuesa, Oscar, et. al.:
Design Methodologies for Sigma-Delta Converters. Pag. 523-559. En: CMOS Telecom Data Converters. Dordrecht,. Kluwer Academic Publishers. 2003. ISBN 0-471-22782-X

Publicaciones en Revistas
Diaz Fortuny, J, Sarazá, Pablo, Castro López, Rafael, Roca, E., Martin Martinez, Javier, et. al.:
Flexible Setup for the Measurement of CMOS Time-dependent Variability with Array-based Integrated Circuits. En: IEEE Transactions on Instrumentation and Measurement. 2020. Vol. 69. Núm. 3. Pag. 853-864. 10.1109/Tim.2019.2906415

F. Passos, Roca, E., Martins, Ricardo, Lourenço, Nuno, Ahyoune, Saiyd, et. al.:
Ready-to-Fabricate RF Circuit Synthesis using a Layout- and Variability-Aware Optimization-based Methodology. En: IEEE Access. 2020. Vol. 8. Pag. 51601-51609. 10.1109/Access.2020.2980211

F. Passos, Chanca, Miguel, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Synthesis of mm-Wave Wideband Receivers in 28nm CMOS Technology for Automotive Radar Applications. En: IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2020. 10.1109/Tcad.2020.2983363

Sarazá, Pablo, Diaz Fortuny, Javier, Castro López, Rafael, Roca, E., Martin Martinez, Javier, et. al.:
A robust and automated methodology for the analysis of Time-Dependent Variability at transistor level. En: Integration. 2020. Vol. 72. Pag. 13-20. 10.1016/j.vlsi.2020.02.002

Sarazá, Pablo, Martin Martinez, Javier, Castro López, Rafael, Roca, E., Rodriguez, Rosana, et. al.:
A detailed study of the gate/drain voltage dependence of RTN in bulk pMOS transistors. En: Microelectronic Engineering. 2019. Vol. 215. 10.1016/j.mee.2019.111004

F. Passos, Roca, Elisenda, Sieiro, Javier, Fiorelli Martegani, Rafaella Bianca, Castro López, Rafael, et. al.:
A Multilevel Bottom-up Optimization Methodology for the Automated Synthesis of RF Systems. En: IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2019. Vol. 39. Núm. 3. Pag. 560-571. 10.1109/Tcad.2018.2890528

Martins, Ricardo, Lourenço, Nuno, Moreira, Fabio, Povoa, Ricardo, Canelas, Antonio, et. al.:
Two-Step RF IC Block Synthesis with Pre-Optimized Inductors and Full Layout Generation In-the-loop. En: IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2018. 10.1109/Tcad.2018.2834394

Moreira, Fabio, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V.:
A comparison of automated RF circuit design methodologies: online versus offline passive component design. En: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2018. Vol. 26. Núm. 11. Pag. 2386-2394. 10.1109/Tvlsi.2018.2859827

Moreira, Fabio, Martins, Ricardo, Lourenço, Nuno, Roca, E., Povoa, Ricardo, et. al.:
Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. En: Integration. 2018. Vol. 63. Pag. 351-361. 10.1016/j.vlsi.2018.02.005

Moreira, Fabio, Gonzalez Echevarria, Reinier, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V.:
A two-step surrogate modeling strategy for single-objective and multi-objective optimization of radiofrequency circuits. En: Soft Computing. 2018. 10.1007/s00500-018-3150-9

Diaz Fortuny, Javier, Martin Martinez, Javier, Rodríguez, Rosana, Castro López, Rafael, Roca, E., et. al.:
A Versatile CMOS Transistor Array IC for the Statistical Characterization of Time-Zero Variability, RTN, BTI and HCI. En: IEEE Journal of Solid-State Circuits. 2018. 10.1109/Jssc.2018.2881923

Diaz Fortuny, Javier, Martín Martínez, Javier, Rodriguez, Rosana, Castro López, Rafael, Roca, E., et. al.:
A Smart Noise- and RTN-Removal Method for Parameter Extraction of CMOS Aging Compact Models. En: Solid-State Electronics. 2018

Gonzalez Echevarria, Reinier, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V., Sieiro, Javier, et. al.:
An automated design methodology of RF circuits by using Pareto-optimal fronts of EM-simulated inductors. En: IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2017. Vol. 36. Núm. 1. Pag. 15-26. 10.1109/Tcad.2016.2564362

Moreira, Fabio, Ye, Yinghao, Spina, Domenico, Roca, E., Castro López, Rafael, et. al.:
Parametric macromodeling of integrated inductors for RF circuit design. En: Microwave and Optical Technology Letters. 2017. Vol. 59. Núm. 5. Pag. 1207-1212. 10.1002/mop.30498

Moreira, Fabio, Roca Moreno, Elisenda, Castro López, Rafael, Fernandez Fernandez, Francisco V.:
An inductor modeling and optimization toolbox for RF circuit design. En: Integration. 2017. Vol. 58. Pag. 463-472. 10.1016/j.vlsi.2017.01.009

Moreira, Fabio, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Radio-Frequency Inductor Synthesis Using Evolutionary Computation and Gaussian-Process Surrogate Modeling. En: Applied Soft Computing. 2017. Vol. 60. Pag. 495-507. 10.1016/j.asoc.2017.07.036

Toro Frías, Antonio, Martín, Pablo, Martin Martinez, Javier, Castro López, Rafael, Roca Moreno, Elisenda, et. al.:
Reliability simulation for analog ICs: Goals, Solutions and Challenges. En: Integration. 2016. Vol. 55. Pag. 341-348. http://dx.doi.org/10.1016/j.vlsi.2016.05.002

Kotti, Mouna, Gonzalez Echevarria, Reinier, Fernandez Fernandez, Francisco V., Roca Moreno, Elisenda, Sieiro, Javier, et. al.:
Generation of surrogate models of Pareto-optimal performance trade-offs of planar inductors. En: Analog Integrated Circuits and Signal Processing. 2014. Vol. 78. Núm. 1. Pag. 87-97. 10.1007/s10470-013-0230-8

Fernandez Fernandez, Francisco V., Roca Moreno, Elisenda, Castro López, Rafael:
Editorial: Introduction to the special issue on SMACD2012. En: Analog Integrated Circuits and Signal Processing. 2014. Vol. 78. Núm. 1. Pag. 61-63. 10.1007/s10470-013-0227-3

Gonzalez Echevarria, Reinier, Castro López, Rafael, Roca, E., Fernandez Fernandez, Francisco V., Sieiro, Javier, et. al.:
Automated generation of the optimal performance trade-offs of integrated inductors. En: IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2014. Vol. 33. Núm. 8. Pag. 1269-1273. 10.1109/Tcad.2014.2316092

Roca Moreno, Elisenda, Velasco Jiménez, Manuel, Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers. En: Analog Integrated Circuits and Signal Processing. 2012. Vol. 73. Núm. 1. Pag. 65-76. 10.1007/s10470-011-9785-4

Morgado García de Polavieja, Alonso, Rio Fernandez, Rocio del, Rosa Utrera, Jose Manuel de la, Castro López, Rafael, Perez Verdu, Maria Belen:
A 0.13 Um CMOS Adaptive Sigma-Delta Modulator for Triple-Mode GSM/Bluetooth/Umts Applications. En: Microelectronics Journal. 2010. Vol. 41. Núm. 5. Pag. 277-290

Rosa Utrera, Jose Manuel de la, Castro López, Rafael, Morgado García de Polavieja, Alonso, Becerra Alvarez, Edwin Christian, Rio Fernandez, Rocio del, et. al.:
Adaptive CMOS Analog Circuits for 4g Mobile Terminals-Review and State-of-the-Art Survey. En: Microelectronics Journal. 2009. Vol. 40. Núm. 1. Pag. 156-176

Castro López, Rafael, Roca Moreno, Elisenda, Fernandez Fernandez, Francisco V.:
Multimode Pareto Fronts for Design of Reconfigurable Analogue Circuits. En: Electronics Letters. 2009. Vol. 45. Núm. 2. Pag. 95-97

Castro López, Rafael, Morgado García de Polavieja, Alonso, Guerra Vinuesa, Oscar, Rio Fernandez, Rocio del, Rosa Utrera, Jose Manuel de la, et. al.:
Systematic Top-Down Design of Reconfigurable SD Modulators for Multi-Standard Transceivers. En: Analog Integrated Circuits and Signal Processing. 2009. Vol. 58. Núm. 3. Pag. 227-241

Liu, Bo, Fernandez Fernandez, Francisco V., Gielen, G., Castro López, Rafael, Roca Moreno, Elisenda:
A Memetic Approach to the Automatic Design of High Performance Analog Integrated Circuits. En: ACM Transactions on Design Automation of Electronic Systems. 2009

Castro López, Rafael, Rodriguez de Llera, Delia, Ismail, Mohammed, Fernandez Fernandez, Francisco V.:
Editorial: AMS/Rf-CMOS Circuit Design for Wireless Transceivers. En: Integration. 2009. Vol. 42. Núm. 1. Pag. 1-2

Tortosa, R., Castro López, Rafael, Rosa Utrera, Jose Manuel de la, Roca Moreno, Elisenda, Rodriguez Vazquez, Angel, et. al.:
Systematic Design of High-Resolution High-Frequency Cascade Continuous-Time Sigma-Delta Modulators. En: ETRI Journal. 2008. Vol. 30. Núm. 4. Pag. 535-545

Castro López, Rafael, Guerra Vinuesa, Oscar, Roca Moreno, Elisenda, Fernandez Fernandez, Francisco V.:
An Integrated Layout-Synthesis Approach for Analog Ics. En: IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems. 2008. Vol. 27. Núm. 7. Pag. 1179-1189

Morgado García de Polavieja, Alonso, Rivas Bastante, Vicente Javier, Rio Fernandez, Rocio del, Castro López, Rafael, Fernandez Fernandez, Francisco V., et. al.:
Behavioral Modeling, Simulation and Synthesis of Multi-Standard Wireless Receivers in Matlab/Simulink. En: Integration. 2008. Vol. 41. Núm. 2. Pag. 269-280

Castro López, Rafael, Morgado García de Polavieja, Alonso, Guerra Vinuesa, Oscar, Rio Fernandez, Rocio del, Rosa Utrera, Jose Manuel de la, et. al.:
Articulo en prensa: Systematic Top-Down Design of Reconfigurable SD Modulators for Multi-Standard Transceivers. En: Analog Integrated Circuits and Signal Processing. 2008. Pag. 1-15

Castro López, Rafael, Guerra Vinuesa, Oscar, Fernandez Fernandez, Francisco V., Rodriguez Vazquez, Angel:
Synthesis of a Wireless Communication Analog Back-End Based on a Mismatch-Aware Symbolic Approach. En: Analog Integrated Circuits and Signal Processing. 2004. Vol. 40. Núm. 3. Pag. 215-233

Castro López, Rafael, Fernandez Fernandez, Francisco V., Medeiro Hidalgo, Fernando Manuel, Rodriguez Vazquez, Angel:
Generation of Technology-Independent Retargetable Analog Blocks. En: Analog Integrated Circuits and Signal Processing. 2002. Vol. 33. Núm. 2. Pag. 157-170

Otra participación en Libros de Actas
Castro López, Rafael (Coeditor/a), Roca Moreno, Elisenda (Coeditor/a):
Actas del congreso International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2012. 2012. ISBN 978-1-4673-0684-3. - Sevilla - ESPAÑA

Aportaciones a Congresos
Sarazá, Pablo, Carrasco Lopez, Hector, Brox Jimenez, Piedad, Castro López, Rafael, Roca, E., et. al.:
Improving the reliability of SRAM-based PUFs in the presence of aging. Comunicación en congreso. IEEE 15th Design & Technology of Integrated Systems in Nanoscale Era. Marrakech (Marruecos). 2020

Pedreira, Gerard, Martin Martinez, Javier, Diaz Fortuny, Javier, Sarazá, Pablo, Rodriguez, Rosana, et. al.:
A new time efficient methodology for the massive characterization of RTN in CMOS devices. Comunicación en congreso. 2019 IEEE International Reliability Physics Symposium. Monterey, Asilomar, Pacific Grove, ASILOMAR, PACIFIC GROVE, CALIFORNIA (USA). 2019

F. Passos, Roca, E., Castro López, Rafael, Horta, Nuno, Fernandez Fernandez, Francisco V.:
Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019

Diaz Fortuny, Javier, Sarazá, Pablo, Castro López, Rafael, Roca, E., Martin Martinez, Javier, et. al.:
TiDeVa: A Toolbox for the Automated and Robust Analysis of Time-Dependent Variability at Transistor Level. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019

Sarazá, Pablo, Diaz Fortuny, Javier, Castro López, Rafael, Roca, E., Martin Martinez, Javier, et. al.:
New method for the automated massive characterization of Bias Temperature Instability in CMOS transistors. Comunicación en congreso. Design Automation and Test in Europe Conference and Exhibition. Florencia (italia). 2019

Martín, Pablo, Nuñez Martínez, Juan, Roca, E., Castro López, Rafael, Martin Martinez, Javier, et. al.:
An IC Array for the Statistical Characterization of Time-Dependent Variability of Basic Circuit Blocks. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019

Toro Frías, Antonio, Sarazá, Pablo, F. Passos, Martín, Pablo, Castro López, Rafael, et. al.:
Generation of Lifetime-Aware Pareto-Optimal Fronts Using a Stochastic Reliability Simulator. Comunicación en congreso. Design Automation and Test in Europe Conference and Exhibition. Florencia (italia). 2019

Nuñez Martínez, Juan, Roca, E., Castro López, Rafael, Martin Martinez, Javier, Rodriguez, Rosana, et. al.:
Experimental Characterization of Time-Dependent Variability in Ring Oscillators. Comunicación en congreso. 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD). Lausanne, ALPINE CENTER PIORA, SWITZERLAND. 2019

Diaz Fortuny, Javier, Martin Martinez, Javier, Rodriguez, Rosana, Castro López, Rafael, Roca, E., et. al.:
A Noise and RTN-Removal Smart Method for the Parameter Extraction of CMOS Aging Compact Models. Comunicación en congreso. 2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon. Granada (España). 2018

Diaz Fortuny, Javier, Saraza Canflanca, Pablo, Toro Frías, Antonio, Castro López, Rafael, Martin Martinez, Javier, et. al.:
A Model Parameter Extraction Methodology Including Time-dependent Variability for Circuit Reliability Simulation. Comunicación en congreso. 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. - Praga, República Checa. 2018

Saraza Canflanca, Pablo, Diaz Fortuny, Javier, Toro Frías, Antonio, Castro López, Rafael, Roca, E., et. al.:
Automated massive RTN characterization using a transistor array chip. Comunicación en congreso. 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. - Praga, República Checa. 2018

Saraza Canflanca, Pablo, Malagon, Daniel, Moreira, Fabio, Toro Frías, Antonio, Nuñez Martínez, Juan, et. al.:
Design considerations of an SRAM array for the statistical validation of time-dependent variability models. Comunicación en congreso. 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. - Praga, República Checa. 2018

Moreira, Fabio, Martins, Ricardo, Lourenço, Nuno, Roca, E., Castro López, Rafael, et. al.:
Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs. Comunicación en congreso. 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. - Praga, República Checa. 2018

Díaz Fortuny, Javier, Martin Martinez, Javier, Rodriguez, Rosana, Nafria, Montserrat, Castro López, Rafael, et. al.:
CMOS characterization and compact modelling for circuit reliability simulation. Comunicación en congreso. 24th International Symposium on On-Line Testing and Robust System Design. Platja D'aro, Girona, España. 2018

Barajas, Enrique, Aragones, Xavier, Mateos, Diego, Moll, Francesc, Rubio, Antonio, et. al.:
Analysis of Body Bias and RTN-induced Frequency Shift of Low Voltage Ring Oscillators in FDSOI Technology. Comunicación en congreso. 28th International Symposium on Power and Timing Modeling, Optimization and Simulation. Platja D'Aro. 2018

Van Santen, Victor M., Diaz Fortuny, Javier, Amrouch, Hussam, Martin Martinez, Javier, Rodriguez, Rosana, et. al.:
Weighted Time Lag Plot Defect Parameter Extraction and GPU-based BTI Modeling for BTI Variability. Poster en Congreso. 2018 IEEE International Reliability Physics Symposium. Burlingame, California (USA). 2018

Toro Frías, Antonio, Martín, Pablo, Martin Martinez, Javier, Castro López, Rafael, Roca, E., et. al.:
Lifetime Calculation Using a Stochastic Reliability Simulator for Analog ICs. Comunicación en congreso. 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. - Praga, República Checa. 2018

Martins, Ricardo, Lourenço, Nuno, Povoa, Ricardo, Canelas, Antonio, Horta, Nuno, et. al.:
Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Giardini Naxos, Italia. 2017

Couso, Carlos, Diaz Fortuny, Javier, Porti, Marc, Rodriguez, Rosana, Nafria, Montserrat, et. al.:
Dependence of MOSFETs threshold voltage variability on channel dimensions. Comunicación en congreso. Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon. Atenas (Grecia). 2017

Diaz Fortuny, Javier, Martin Martinez, Javier, Rodriguez, Rosana, Nafria, Montserrat, Castro López, Rafael, et. al.:
TARS: A toolbox for statistical reliability modeling of CMOS devices. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Giardini Naxos, Italia. 2017

Diaz Fortuny, Javier, Martin Martinez, Javier, Rodríguez, Rosana, Nafria, Montserrat, Castro López, Rafael, et. al.:
A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Giardini Naxos, Italia. 2017

Martín, Pablo, Toro Frías, Antonio, Martin Martinez, Javier, Castro López, Rafael, Roca, E., et. al.:
A size-adaptive time-step algorithm for accurate simulation of aging in analog ICs. Poster en Congreso. 2017 IEEE International Symposium on Circuits and Systems (ISCAS). Baltimore, MD, USA. 2017

Toro Frías, Antonio, Martín, Pablo, Castro López, Rafael, Roca, E., Fernandez Fernandez, Francisco V., et. al.:
Including a stochastic model of aging in a reliability simulation flow. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Giardini Naxos, Italia. 2017

Martín, Pablo, Toro Frías, Antonio, Castro López, Rafael, Roca, E., Fernandez Fernandez, Francisco V., et. al.:
CASE: A reliability simulation tool for analog ICs. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Giardini Naxos, Italia. 2017

Diaz Fortuny, Javier, Martin Martinez, Javier, Rodriguez, Rosana, Nafria, Montserrat, Castro López, Rafael, et. al.:
Statistical characterization of unreliability effects in a 65-nm CMOS transistor array. Comunicación en congreso. 22nd International Mixed-Signal Testing Workshop. Thessaloniki (Greece). 2017

Diaz Fortuny, Javier, Martin Martinez, Javier, Rodriguez, Rosana, Nafria, Montserrat, Castro López, Rafael, et. al.:
Statistical characterization of reliability effects in nanometer CMOS using a versatile transistor array IC. Comunicación en congreso. XXXII Conference of Design of Circuits and Integrated Systems (DCIS¿2017). Barcelona, España. 2017

Toro Frías, Antonio, Martín, Pablo, Martin Martinez, Javier, Castro López, Rafael, Rodriguez, Rosana, et. al.:
Efficient Computation of Yield and Lifetime for Analog ICs under Process Variabiliy and Aging. Comunicación en congreso. XXXII Conference of Design of Circuits and Integrated Systems (DCIS¿2017). Barcelona, España. 2017

Moreira, Fabio, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V., Martins, Ricardo, et. al.:
Systematic design of a voltage controlled oscillator using a layout-aware approach. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Giardini Naxos, Italia. 2017

Lourenço, Nuno, Martins, Ricardo, Canelas, Antonio, Povoa, Ricardo, Horta, Nuno, et. al.:
New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization. Comunicación en congreso. 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Giardini Naxos, Italia. 2017

Moreira, Fabio, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V.:
An algorithm for a class of real-life multi-objective optimization problems with a sweeping objective. Comunicación en congreso. IEEE Congress on Evolutionary Computation 2017. Donostia - San Sebastián (España), PAÍS VASCO. 2017

Moreira, Fabio, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V., Sieiro, Javier, et. al.:
A strategy to efficiently include electromagnetic simulations in optimization-based RF circuit design methodologies. Comunicación en congreso. 2017 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization for RF, Microwave, and Terahertz Applications. Pabellón de México, - Universidad de Sevilla, Sevilla (España). 2017

Castro López, Rafael:
Reliability in the analog flow: from characterization and modeling to design automation. Ponencia en Congreso. 2017 International Conference On Computer Aided Design. Irvine Marriott Irvine, CA (USA). 2017

Velasco Jiménez, Manuel, Castro López, Rafael, Rosa Utrera, Jose Manuel de la:
Live demonstration: High-level optimization of Sigma-Delta modulators using multi-objetive evolutionary algorithms. Demostración en Congreso. IEEE International Symposium on Circuits and Systems. Montreal, Canada. 2016

Velasco Jiménez, Manuel, Castro López, Rafael, Rosa Utrera, Jose Manuel de la:
High-Level Optimization of Sigma-Delta Modulators Using Multi-Objetive Evolutionary Algorithms. Comunicación en congreso. IEEE International Symposium on Circuits and Systems. Montreal, Canada. 2016

Moreira, Fabio, Gonzalez Echevarria, Reinier, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Accurate Synthesis of Integrated RF Passive Components Using Surrogate Models. Comunicación en congreso. Design Automation and Test in Europe Conference and Exhibition. Dresden (Germany). 2016

Moreira, Fabio, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V.:
SIDe-O: A Toolbox for Surrogate Inductor Design and Optimization. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Lisboa (Portugal). 2016

Moreira, Fabio, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V., Ye, Y., et. al.:
Frequency-Dependent Parameterized Macromodeling of Integrated Inductors. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Lisboa (Portugal). 2016

Toro Frías, Antonio, Castro López, Rafael, Roca, E., Fernandez Fernandez, Francisco V., Martin Martinez, Javier, et. al.:
A fast and accurate reliability simulation method for analog circuits. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Istambul (Turkey). 2015

Moreira, Fabio, Gonzalez Echevarria, Reinier, Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Surrogate modeling and optimization of inductor performances using Kriging functions. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Istambul (Turkey). 2015

Roca, E., Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Aplicación de algoritmos evolutivos multiobjectivo al diseño de circuitos integrados: criterios de detención. Comunicación en congreso. X Congreso Español de Metaheurísticas, Algoritmos Evolutivos y Bioinspirados. Merida, Almendralejo. 2015

Velasco Jiménez, Manuel, Castro López, Rafael, Roca, E., Fernandez Fernandez, Francisco V.:
Design Space Exploration Using Hierarchical Composition of Performance Models. Comunicación en congreso. IEEE International Symposium on Circuits and Systems. Lisboa (Portugal). 2015

Roca, E., Castro López, Rafael, Velasco Jiménez, Manuel, Fernandez Fernandez, Francisco V.:
Transformation conditions of performance fronts of operational amplifiers. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Istambul (Turkey). 2015

Moreira, Fabio, Kotti, Mouna, Gonzalez Echevarria, Reinier, Fino, Maria Helena, Fakhfakh, Mourad, et. al.:
Physical vs. Surrogate Models of Passive RF Devices. Comunicación en congreso. IEEE International Symposium on Circuits and Systems. Lisboa (Portugal). 2015

Velasco Jiménez, Manuel, Castro López, Rafael, Roca, E., Fernandez Fernandez, Francisco V.:
Implementation Issues in the Hierarchical Composition of Performance Models of Analog Circuits. Comunicación en congreso. Design, Automation and Test in Europe. Dresden, Alemania. 2014

Velasco Jiménez, Manuel, Castro López, Rafael, Roca, E., Fernandez Fernandez, Francisco V.:
Hierarchical Composition of Pareto-Optimal Fronts of Analog Circuits: Implementation Issues. Comunicación en congreso. Design of Circuits and Integrated Systems Conference. - Madrid. 2014

Gonzalez Echevarria, Reinier, Castro López, Rafael, Roca Moreno, Elisenda, Fernandez Fernandez, Francisco V., Lopez Villegas, J.m., et. al.:
A fully automated design flow for planar inductors. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Seville (Spain). 2012

Toro Frías, Antonio, Castro López, Rafael, Roca Moreno, Elisenda, Fernandez Fernandez, Francisco V.:
An Automated Layout-Aware Design Flow. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Seville (Spain). 2012

Kotti, M, Gonzalez Echevarria, Reinier, Roca Moreno, Elisenda, Castro López, Rafael, Fernandez Fernandez, Francisco V., et. al.:
Surrogate models of Pareto-optimal planar inductors. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. 2012

Fernandez Fernandez, Francisco V., Roca Moreno, Elisenda, Castro López, Rafael:
New approaches to bridge the design gap of analog and RF circuits. Comunicación en congreso. International Conf. on Analog VLSI Circuit. Valencia, Spain. 2012

Velasco Jiménez, Manuel, Castro López, Rafael, Roca Moreno, Elisenda, Fernandez Fernandez, Francisco V.:
Systematic Generation of Performance Models of Reconfigurable Analog Circuits. Comunicación en congreso. International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Seville (Spain). 2012

Toro Frías, Antonio, Castro López, Rafael, Roca Moreno, Elisenda, Fernandez Fernandez, Francisco V.:
Layout-Aware Pareto Fronts of Electronic Circuits. Comunicación en congreso. European Conference on Circuit Theory and Design. 2011

Esteban Muller,Juan, Gonzalez Echevarria, Reinier, Sanchez Lopez, Carlos, Roca Moreno, Elisenda, Castro López, Rafael, et. al.:
Multi-Objective Performance Optimization of Planar Inductors. Comunicación en congreso. International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. Gammarth, Tunisia. 2010. Proceedings of the Xith International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. 1. 4

Sanchez Lopez, Carlos, Castro López, Rafael, Roca Moreno, Elisenda, Fernandez Fernandez, Francisco V., Gonzalez Echevarria, Reinier, et. al.:
A Bottom-Up Approach to the Systematic Design of Lnas Using Evolutionary Optimization. Comunicación en congreso. International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. Gammarth, Tunisia. 2010. Proceedings of the Xith International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. 1. 5

Roca Moreno, Elisenda, Velasco Jiménez, Manuel, Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Context-Independent Performance Modeling of Operational Amplifiers Using Pareto Fronts. Comunicación en congreso. International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. Gammarth, Tunisia. 2010. Proceedings of the Xith International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. 1. 4

Velasco Jiménez, Manuel, Castro López, Rafael, Roca Moreno, Elisenda, Fernandez Fernandez, Francisco V.:
A Pareto-Based Systematic Design Technique for Reconfigurable Analog Circuits Using an Evolutionary Optimization Algorithm. Comunicación en congreso. Design of Circuits and Integrated Systems Conference. Lanzarote, España. 2010. Proceedings of the Design of Circuits and Integrated Systems Conference. 27. 32

Roca Moreno, Elisenda, Velasco Jiménez, Manuel, Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Load-Independent Characterization of Trade-Off Fronts for Operational Amplifiers. Comunicación en congreso. Design of Circuits and Integrated Systems Conference. Lanzarote, España. 2010. Proceedings of the Design of Circuits and Integrated Systems Conference. 22. 26

Fernandez Fernandez, Francisco V., Esteban Muller,Juan, Roca Moreno, Elisenda, Castro López, Rafael:
Stopping Criteria in Evolutionary Algorithms for Multi-Objective Performance Optimization of Integrated Inductors. Comunicación en congreso. IEEE International Conference on Evolutionary Computation (Cec2010). 2010. IEEE International Conference on Evolutionary Computation (Cec2010). 4172. 4179

Roca Moreno, Elisenda, Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Hierarchical Synthesis Based on Pareto-Optimal Fronts. Comunicación en congreso. European Conference on Circuit Theory and Design. Antalia, Turquía. 2009. Proceedings of European Conference on Circuit Theory and Design. 755. 758

Roca Moreno, Elisenda, Fakhfakh, Mourad, Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Applications of Evolutionary Computation Techniques to Analog, Mixed-Signal and Rf Circuit Design ¿ an Overview. Comunicación en congreso. International Conference on Electronics Circuits and Systems. Yasmine Hammamet, Túnez. 2009. Proceedings International Conference on Electronics Circuits and Systems. 251. 254

Castro López, Rafael, Roca Moreno, Elisenda, Fernandez Fernandez, Francisco V.:
Using Pareto-Optimal Fronts in the Design of Reconfigurable Data Converters. Comunicación en congreso. International Conference on Advances in Circuits, Electronics and Microelectronics. Sliema, Malta. 2009. Proceedings of the Second International Conference on Advances in Circuits, Electronics. 34. 39

Graeb, Helmut, Balasa, Florin, Castro López, Rafael, Chang, Yao Wen, Fernandez Fernandez, Francisco V., et. al.:
Analog Layout Synthesis ¿ Recent advances in topological approaches. Comunicación en congreso. Design Automation and Test in Europe Conf. 2009

Liu, Bo, Fernandez Fernandez, Francisco V., Gielen, G., Castro López, Rafael, Roca Moreno, Elisenda, et. al.:
Msoea: a New Methodology for Synthesis of High Performance Analog Integrated Circuits. Comunicación en congreso. International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. Erfurst, Alemania. 2008. Proceedings of the Xth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. 74. 79

Castro López, Rafael, Roca Moreno, Elisenda, Fernandez Fernandez, Francisco V.:
Hierarchical Design of Reconfigurable Analog Circuits Using Multi-Mode Pareto Fronts. Comunicación en congreso. International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. Erfurst, Alemania. 2008. Proceedings of the Xth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. 107. 112

Fernandez Fernandez, Francisco V., Liu, Bo, Castro López, Rafael, Roca Moreno, Elisenda:
Quality Metrics of Pareto-Optimal Fronts for Multi-Objective Synthesis of Analog Ics. Comunicación en congreso. International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. Erfurst, Alemania. 2008. Proceedings of the Xth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design. 56. 60

Rivas Bastante, Vicente Javier, Morgado García de Polavieja, Alonso, Castro López, Rafael, Roca Moreno, Elisenda, Rio Fernandez, Rocio del, et. al.:
Towards Systematic Design of Multistandard Converters. Comunicación en congreso. VLSI Circuits and Systems III. International Symposium on Microtechnologies for the New Milleniu. Costa Meloneras, Gran Canaria, España. 2007. Proceedings of SPIE ( Año: 2007, Difusión: Internacional ). --. --

Tortosa, R., Castro López, Rafael, Rosa Utrera, Jose Manuel de la, Rodriguez Vazquez, Angel, Fernandez Fernandez, Francisco V.:
A Design Tool for High-Resolution High-Frequency Cascade Continuous-Time Sigma Delta Modulators. Comunicación en congreso. VLSI Circuits and Systems III. International Symposium on Microtechnologies for the New Milleniu. Maspalomas, Gran Canaria, Spain. 2007. Proceedings of SPIE ( Año: 2007, Difusión: Internacional ). --. --

Medeiro Hidalgo, Fernando Manuel, Charler, a, Utrera, C, Segovia, J.A., Sánchez Franco,a, et. al.:
Design of a 12-Bit 44msps Pipelines ADC for Multi Standard Digital Radio in 0.13mm CMOS Technology. Comunicación en congreso. IBERCHIP. San Jose, Costa Rica. 2006. XII Workshop IBERCHIP. --. --

Ruiz Amaya, Jesus, Delgado Restituto, Manuel, Fernández Bootello, Juan Francisco, Brandano, Davide, Castro López, Rafael, et. al.:
A 12-Bit CMOS Current Steering D/a Converter for Embedded Systems. Comunicación en congreso. IEEE Asia Pacific Conference on Circuits and Systems. Singapore. 2006. Proceedings of IEEE Asia Pacific Conference on Circuits and Systems. 1704. 1707

Rivas Bastante, Vicente Javier, Castro López, Rafael, Fernandez Fernandez, Francisco V.:
Towards Systematic Design of Multi-Standard Rf Transceivers. Comunicación en congreso. Ifip International Conference on Very Large Scale Integration . Nice (Francia). 2006. Proceedings of Ifip International Conference on Very Large Scale Integration. --. --

Espín Garcia, Álvaro, Escalera Moron, Sara, Castro López, Rafael, Guerra Vinuesa, Oscar:
An Alternative to Histogram Method for the Static Test of High-Resolution Sigma-Delta Converters. Comunicación en congreso. IEEE International Mixed Signal Testing Workshop. Edingurgh. 2006. Proceedings of the 12th IEEE International Mixed Signal Testing Workshop. 9. 12

Escalera Moron, Sara, Espín Garcia, Álvaro, Castro López, Rafael, Guerra Vinuesa, Oscar:
An Alternative for the Fft Test in Sigma-Delta Modulators and Converters. Comunicación en congreso. DCIS 2006. Barcelona (Spain). 2006. Proceeding of the XXI Conference on Design of Circuits and Integrated Systems. --. --

Castro López, Rafael, Fernandez Fernandez, Francisco V., Rodriguez Vazquez, Angel:
Geometrically Constrained Parasitic-Aware Synthesis of Analog Ics. Comunicación en congreso. Conference on VLSI Circuits and Systems II. Santander (ESPAÑA). 2005. VLSI Circuits and Systems II. 673. 684

Castro López, Rafael, Fernandez Fernandez, Francisco V., Rodriguez Vazquez, Angel:
On the Suitability and Development of Layout Templates for Analog Layout Reuse and Layout-Aware Synthesis. Comunicación en congreso. Conference on VLSI Circuits and Systems II. Santander (ESPAÑA). 2005. VLSI Circuits and Systems II. 661. 672

Castro López, Rafael, Fernandez Fernandez, Francisco V., Rodriguez Vazquez, Angel:
A Reuse-Based Framework for the Design of Analog and Mixed-Signal Ics. Comunicación en congreso. Conference on VLSI Circuits and Systems II. Santander (ESPAÑA). 2005. VLSI Circuits and Systems II. 25. 36

Castro López, Rafael, Guerra Vinuesa, Oscar, Fernandez Fernandez, Francisco V., Rodriguez Vazquez, Angel:
Optimization-Based Synthesis of Analogue Circuits Via Mismatch-Aware Symbolic Analysis. Comunicación en congreso. Conferencia de Diseño de Circuitos Integrados y Sistemas. Ciudad Real. 2003. Proceedings of the XVIII International Conference on Design of Circuits and Integrated Systems. 691. 696

Castro López, Rafael, Fernandez Fernandez, Francisco V., Medeiro Hidalgo, Fernando Manuel, Rodriguez Vazquez, Angel:
Accurate VHDL-Based Simulation of Sigma-Delta Modulators. Comunicación en congreso. IEEE Insternational Symposium on Circuits and Systems . Bangkok, Tailandia. 2003. ISCAS 2003: the 2003 IEEE International Symposium on Circuits and Systems: [recurso Electrónico]. 632. 635

Castro López, Rafael, Fernandez Fernandez, Francisco V., Medeiro Hidalgo, Fernando Manuel, Rodriguez Vazquez, Angel:
Behavioural Modelling and Simulation of S. Modulators Using Hardware Description Languages. Comunicación en congreso. Design, Automation and Test in Europe . Messe, Munich, Alemania. 2003. Design, Automation and Test in Europe: Date 03. 168. 173

Castro López, Rafael, Ruiz Amaya, Jesus, Romay, Rafael, Rosa Utrera, Jose Manuel de la, Rio Fernandez, Rocio del, et. al.:
Description Languages and Tools for Behavioural Simulation of Sigma-Delta Modulators: a Comparative Survey. Comunicación en congreso. Forum on Specification & Design Languages. Frankfurt, Alemania. 2003. Proc. of the 2003 Forum on Specification & Design Languages ( FDL 2003 ). 121. 132

Castro López, Rafael, Medeiro Hidalgo, Fernando Manuel, Rodriguez Vazquez, Angel:
Behavioural Modelling and Simulation of Sigma Delta Modulators Using Hardware Description Languages. Comunicación en congreso. Design, Automation Test in Europe. Paris. 2002. Date Conference 2002. 1530. 1591

Castro López, Rafael, Guerra Vinuesa, Oscar, Fernandez Fernandez, Francisco V., Rodriguez Vazquez, Angel:
Synthesis of a Wireless Communication Analog Backend Using a Symbolic Analyzer. Comunicación en congreso. International Workshop on Symbolic Methods and Applications to Circuit Design. Sinaia, Rumania. 2002. Smacd Workshop 2002. 13. 16

Castro López, Rafael, Fernandez Fernandez, Francisco V., Delgado Restituto, Manuel, Medeiro Hidalgo, Fernando Manuel, Rodriguez Vazquez, Angel:
Generation of Technology-Portable Flexible Analog Blocks. Comunicación en congreso. IEEE International Symposium on Circuits and Systems. -. 2002. IEEE International Symposium on Circuits and Systems. 61. 64

Castro López, Rafael, Fernandez Fernandez, Francisco V., Delgado Restituto, Manuel, Medeiro Hidalgo, Fernando Manuel, Rodriguez Vazquez, Angel:
Creating Flexible Analogue IP Blocks. Comunicación en congreso. European Solid-State Circuits Conference. Villach, Austria. 2001. Esscirc'2001. 448. 451

Castro López, Rafael, Fernandez Fernandez, Francisco V., Delgado Restituto, Manuel, Rodriguez Vazquez, Angel:
A Complete Retargeting Methodology for Mixed-Signal IC Designs. Comunicación en congreso. European Conference on Circuit Theory and Design. Helsinki. 2001. Ecctd'2001. 121. 124

Castro López, Rafael, Fernandez Fernandez, Francisco V., Delgado Restituto, Manuel, Medeiro Hidalgo, Fernando Manuel, Rodriguez Vazquez, Angel:
Layout-Constrained Retargeting of Analog Blocks. Comunicación en congreso. Proc. Design Circuits and Integrated Systems Conference. Oporto. 2001. DCIS Conference 2001. 202. 206

Castro López, Rafael, Fernandez Fernandez, Francisco V., Delgado Restituto, Manuel, Rodriguez Vazquez, Angel:
Retargeting of Mixed-Signal Blocks for Socs. Comunicación en congreso. Design, Automation and Test in Europe Conference. Munich. 2001. Date Conference 2001. 772. 773

Castro López, Rafael, Delgado Restituto, Manuel, Fernandez Fernandez, Francisco V., Rodriguez Vazquez, Angel:
Reusability Methodology for Mixed-Signal ASIC Design At Layout and Schematic Level. Comunicación en congreso. Design of Integrated Circuits and Systems DCIS 2000. Montpellier, Francia. 2000. Dcis'2000. 492. 497

Horta, N, Vital, J., Pereira, M, Franca, J., Castro López, Rafael, et. al.:
Rapid-Retargetability for Reusability of Application-Driven Quadrature D/a Interface Block Design. Comunicación en congreso. Design of Circuits and Integrated Systems Conference. Palma de Mallorca. 1999. Proceedings of the XIV International Conference on Design of Circuits and Integrated Systems. 51. 56

Franca, J., Horta, N, Pereira, M, Vital, J., Castro López, Rafael, et. al.:
Rapid-Retargetability for Reusability of Application-Driven Quadrature D/a Interface Block Design. Comunicación en congreso. IEEE International Conference on Electronics, Circuits and Systems. Pafos, Chipre. 1999. Icecs Conference 1999. 1679. 1683

Tesis dirigidas y co-dirigidas:


Velasco Jiménez, Manuel:
Diseño sistemático de circuitos analógicos y de señal mixta reconfigurables. Tesis Doctoral. 2017

(Doctorando no grabado)
Diseño de circuitos analógicos y de señal mixta con consideraciones de diseño fisico y variabilidad. Tesis Doctoral. 2017

Vicerrectorado de Investigación. Universidad de Sevilla. Pabellón de Brasil. Paseo de las Delicias s/n. Sevilla